Layout DFM requirements
1 the process route has been determined and all the devices have been placed on the floor.
The 2 coordinate origin is the left and the right extension lines of the frame, or the lower left pad of the left lower socket.
3 the actual size of the PCB, the location of the positioner, and so on are consistent with the structural elements of the process, and the device layout of the region where the height of the device is required to meet the requirements of the structural element diagram.
4 dial switch, reset device, indicator light and other suitable position, the handle and its surrounding devices do not produce position interference.
5 plate frame smooth radian 197mil, or according to the size of the design.
6 the general board has the 200mil craft side the left and right sides of the left side of the backplane are larger than 400mil and the upper and the lower sides are provided with more than 680mil. Device placement does not conflict with the window position.
7 need to add additional holes (ICT positioning hole 125mil, handle hole, elliptical hole and optical fiber support hole) without missing, and set the correct.
8 wave soldering process of the device pin spacing, device orientation, device spacing, device library, taking into account the requirements of wave soldering process.
9 device layout spacing meet the assembly requirements: surface mount device is greater than 20MIL, IC greater than 80mil, BGA greater than 200mil.
10 the pressure member is higher than 120mil in the component surface distance higher than that of the device, and there is no device in the welding surface crimping connector through the region.
11 there is no short device between the high devices, and the device is not placed between the height of more than 10mm of the 5mm device and the installation of short, small plug-in devices.
12 polarity devices have polarity screen printing. The same type of polarity components X, Y to the same direction.
13 all devices have a clear identification, no P*, REF, etc. are not clearly identified.
14 the surface of the device containing the chip has 3 positioning cursor, which is arranged in a "L" shape. Position the center distance from the edge of the plate is greater than 240mil.
15 if you need do a jigsaw, layout view to facilitate the imposition, easy processing and assembly PCB.
16 the gap of the edge of the plate (special edge) should be used in the form of milling groove and stamp hole. Stamp hole for metal air, usually 40mil in diameter and edge distance 16mil.
17 test points for debugging have been added in the schematic and the layout is in place.

Thermal design requirements
18 the heating element and the shell exposed device are not adjacent to the conducting wire and the thermal sensitive element.
19 when the radiator is placed into account, there is no high interference in the projection area of the radiator.
20 layout to take into account the reasonable cooling channel.
21 electrolytic capacitors appropriate to leave the high thermal device.
22 taking into account the high power devices and pinch devices under the cooling problem.

Signal integrity requirements
The 23 terminal is matched to the originating device, and the terminal is matched to the receiving end device.
24 decoupling capacitor close to the relevant device placement
25 crystal, crystal oscillator and clock driver chip close to the relevant device placement.
26 high speed and low speed, digital and analog layout by module.
27 according to the analysis of the simulation results or experience to determine the bus topology, to ensure that the system requirements.
28 If the board design, combined with the test report reflected in the signal integrity simulation and give solutions.
29 pairs of synchronous clock bus system layout to meet the timing requirements.

EMC requirements
30 inductive devices such as inductors, relays and transformers, which are prone to magnetic field coupling, do not close to each other. When there are a plurality of inductance coils, the direction is vertical and is not coupled.
31 in order to avoid the electromagnetic interference between the single board surface and the adjacent single board, the board is not placed on the surface of sensitive devices and strong radiation devices.
32 interface device placed near the edge of the board, has taken appropriate EMC protection measures (such as with shielding shell, power supply, etc.) to improve the design of the EMC capacity.
33 protection circuit is placed near the interface circuit, following the principle of the first protective filter.
34 transmit power is very large or particularly sensitive devices (such as crystal, crystal, etc.) from the shield, shielding shell 500mil above.
35 reset switch in the vicinity of the reset line placed a 0.1uF capacitor, reset device, reset signal away from other strong interference devices, signal.

Layer setting and power ground segmentation requirements
37 when the two signal layer directly adjacent to the definition of vertical wiring rules.
38 the main power supply layer is adjacent to the corresponding layer as far as possible, and the power supply layer satisfies the 20H rule.
39 each wiring layer has a complete reference plane.
40 multilayer laminate, core material (CORE) symmetry, to prevent the uneven distribution of copper skin density, the thickness of the asymmetry of the media to produce warpage.
41 plate thickness of not more than 4.5mm, for the plate thickness greater than 2.5mm (backplane is greater than 3mm) should have been confirmed by the process PCB processing, assembly, equipment, no problem, PC card thickness of 1.6mm.
42 when the thickness ratio of the hole is greater than 10:1, it is confirmed by PCB manufacturers.
43 optical module power supply, ground and other power supply, ground to reduce interference.
44 key components of the power supply, ground treatment to meet the requirements.
45 when the impedance control is required, the layer setting parameters meet the requirements.

Power module requirements
46 the layout of the power supply to ensure that the input and output lines smooth, not cross.
47 when the power supply is supplied to the power outlet of the single board and the power supply of the gusset plate, the corresponding filtering circuit is placed nearby.

Other requirements
48 layout taking into account the overall smooth line, the main data flow reasonable.
49 adjust the allocation of pins, FPGA, EPLD, bus drivers and other devices according to the layout results to optimize the routing.
50 considering the increasing intensive layout line at the space, in order to avoid the situation can not be found.
51 such as the use of special materials, special devices (such as 0.5mmBGA, etc.), the special process, has fully considered the arrival of the deadline, machinability, and get PCB manufacturers, technical personnel to confirm.
The corresponding relationship between the pins of the 52 gusset plate connectors has been confirmed in order to prevent the direction and the orientation of the gusset plate.
53 If there is a ICT test requirements, consider the layout of the ICT test points to add the feasibility, so as to avoid the difficulty of adding test points in the wiring phase.
54 contains a high-speed optical module, optical transceiver circuit layout is preferred.
55 after the completion of the layout has been provided for the 1:1 assembly drawings for the project control device entity check whether the package is correct.
56 window has been considered into the inner plane of the internal shrinkage, and has been set up the appropriate wiring area.