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  • PCB pad design of the pore size
     
    Date :2010-5-4

       

    In accordance with the pad is designed to meet the requirements of the smallest diameter, the diameter of at least the terminal than the welding large diameter flange hole 0.5mm.

     

    Must be in accordance with ANSI / IPC 2221 nodes required to provide testing for all pads. Node is between two or more components of the electrical connections. A test pad requires a signal names (node signal names), printed circuit board with the relevant reference point, and test pad xy axis coordinate position (note pads in the printed circuit board test which side). SMT fixtures need to provide the information, but also the layout of printed circuit board assembly temperature combined technologies to the "circuit test fixtures," or commonly known as "nail bed fixtures", to promote the in circuit testability. To this end, need to:
    1) designed to detect the test pad diameter should be no less than 0.9mm.
    2) The test pad should be larger than the space around 0.6mm but less than 5mm. If the components of height greater than 6. 7mm, then the test pad should be placed outside of the components 5mm.
    3) 3mm from the edge of printed circuit board not to place any components within or test pads.
    4) The test pad should be placed in a 2.5mm hole in the center of the grid. If possible, allow the use of standard probes and a more reliable fixtures.
    5) Do not rely on the edge connector to be pad pointer test. Test probes can easily damage the gold pointers.
    6) Avoid PTH - printed circuit board on both sides of the probe. To test advanced printed circuit board through the holes into the non-parts / welding surface.

     

    Plated through-hole aspect ratio for manufacturers in the plated through hole plating of the capacity to effectively have an important influence, also in ensuring PTH / PTV structure reliability are also important. When the pore size is less than the basic circuit board thickness of 1 / 4, the tolerance should be increased by 0.05mm. When the hole diameter of 0.35mm or more hours, the aspect ratio of 4:1 or greater, the manufacturer should use the appropriate means covered or blocked PTH to prevent entry of solder. In general, the printed circuit board thickness and the ratio of PTH spacing should be less than 5: 1.

     

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